Syllabus DIGITAL IC DESIGN R13 Regulation B.Tech JNTUK-kakinada Syllabus download

Syllabus , DIGITAL IC DESIGN, R13 Regulation, B.Tech , JNTUK,Syllabus, download,

DIGITAL IC DESIGN Syllabus R13 Regulation RT4104B

Unit - I

MOS Design: Pseudo NMOS Logic – Inverter, Inverter threshold voltage, Output high voltage, Output Low voltage, Gain at gate threshold voltage, Transient response, Rise time, Fall time, Pseudo NMOS logic gates, Transistor equivalency, CMOS Inverter logic.

Unit - II

Combinational MOS Logic Circuits: MOS logic circuits with NMOS loads, Primitive CMOS logic gates – NOR & NAND gate, Complex Logic circuits design – Realizing Boolean expressions using NMOS gates and CMOS gates, AOI and OIA gates, CMOS full adder, CMOS transmission gates, Designing with Transmission gates.

Unit - III

Sequential MOS Logic Circuits: Behaviour of bistable elements, SR Latch, Clocked latch and flip flop circuits, CMOS D latch and edge triggered flipflop.

Unit - IV

Dynamic Logic Circuits: Basic principle, Voltage Bootstrapping, Synchronous dynamic pass transistor circuits, Dynamic CMOS transmission gate logic, High performance Dynamic CMOS circuits.

Unit - V

Interconnect: Capacitive Parasitics, Resistive Parasitics, Inductive Parasitics, Advanced Interconncet Techniques.

Unit - VI

Semiconductor Memories: Memory Types, RAM array organization, DRAM – Types, Operation, Leakage currents in DRAM cell and refresh operation, SRAM operation Leakage currents in SRAM cells, Flash Memory- NOR flash and NAND flash.

Text Books

1. Digital Integrated Circuits – A Design Perspective, Jan M. Rabaey, Anantha Chandrakasan, Borivoje Nikolic, 2nd Ed., PHI.
2. Digital Integrated Circuit Design – Ken Martin, Oxford University Press, 2011.

Reference Books

1. CMOS Digital Integrated Circuits Analysis and Design – Sung-Mo Kang, Yusuf Leblebici, TMH, 3rd Ed., 2011.
2. CMOS VLSI Design – Neil H.E Weste, David harris, Ayan Banerjee 3rd Edition, Pearson

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